Current ultra large scale integrated circuits tend to enhance packaging density, and various microscopic processing technologies have been studied and developed. Thus, the design-rule has reached a sub half micron order. One of the technologies which have been developed to satisfy requirements for such severe fining is a CMP technology. This CMP technology can fully smooth a layer to be exposed, reduce the load of an exposure technology, and stabilize the yield in steps f or manufacturing semiconductor devices. Thus, the CMP technology is an essential technology for smoothing an interlayer insulating film and a BPSG film, and performing shallow trench isolation, for example.
In steps for manufacturing semiconductor devices, as a CMP abrasive for smoothing inorganic insulating films such as silicon oxide insulating films formed by a plasma-CVD (Chemical Vapor Deposition) method, a low pressure-CVD method or the like, fumed silica series abrasives have been generally studied. The fumed silica series abrasives are produced by causing grain growth by a process of subjecting to pyrolysis of silica particles into silicic tetrachloride or the like and by performing pH adjustment. However, such an abrasive incurs technical problems that the polishing speed for inorganic insulating films is not sufficient, causing a low polishing speed in practical use.
In a conventional CMP technology for smoothing an interlayer insulating film, there are technical problems that high level smoothing cannot be realized in the entire surface of a wafer since the dependency of polishing speed on the pattern of a film to be polished on a substrate is great, the polishing speeds in projected portions are largely differentiated due to the magnitude of the pattern density difference or the size difference, and the polishing of even recessed portions proceeds.
Further, in the CMP technology for smoothing the interlayer film, it is necessary to finish polishing in the middle of the interlayer film, and a method for controlling a process of controlling the amount of polishing by polishing time has been generally carried out. However, since the polishing speed is remarkably changed not only due to the change in shapes of pattern steps, but also due to the conditions of polishing cloth and the like, there is the problem that process management is difficult.
LOCOS (Local Oxidation of Silicon) had been used for element isolation in integrated circuits in the generation of a 0.5 μm or more design-rule. As the working size becomes finer thereafter, technologies of narrower width of element isolation have been required and shallow trench isolation is being used. In the shallow trench isolation, the CMP is used for removing excess silicon oxide films formed on a substrate and a stopper film having a slow polishing speed is formed beneath the silicon oxide film to stop the polishing. As a stopper film, silicon nitride and the like are used, and preferably, the ratio of the polishing speed between the silicon oxide film and the stopper film is large. Conventional fumed silica series abrasives have a polishing speed ratio of as small as about 3 between the above-mentioned silicon oxide film and the stopper film, and the fumed silica abrasives have a problem that they do not have properties endurable for practical use for shallow trench isolation.
On the other hand, as the glass-surface abrasive for photomasks, lenses, and the like, a cerium oxide abrasive has been used. As cerium oxide particles have lower hardness than silica particles or alumina particles, they tend to cause few scratches on a surface to be polished so that they are useful for finishing mirror polishing. However, since the cerium oxide abrasive for glass surface polishing uses a dispersant containing a sodium salt, it cannot be applied to an abrasive for semiconductors as it is.
An object of the present invention is to provide a CMP abrasive which is capable of polishing a surface to be polished such as a silicon oxide insulating film at high speed without causing scratches while attaining high level smoothing and has a high storage stability.
Another object of the present invention is to provide a method for polishing a substrate which is capable of polishing a surface to be polished of a substrate at high speed without causing scratches while attaining high level smoothing with easy process control.
A further object of the present invention is to provide a method for manufacturing a semiconductor device which is capable of manufacturing a semiconductor device having a high reliability with high productivity and good yield.
Still further object of the present invention is to provide an additive for a CMP abrasive capable of polishing a surface to be polished at high speed without causing scratches while attaining high level smoothing, and particularly capable of providing the CMP abrasive with an excellent storage stability.